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A chip from sand to package: nodes, fabs and the India Semiconductor Mission

Prelims and MainsCurrent affairs on this: Semiconductors, computing hardware and data centres

A chip is a slice of pure silicon on which billions of transistors, switches that pass or block current, are printed by light. The chain has five links: polysilicon refined from sand, pulled into an ingot and sliced into wafers; design, where a company writes the circuit in software; fabrication, where a fab prints the design layer by layer by photolithography; assembly, testing, marking and packaging, where the wafer is cut and each die is wired and sealed; and the board that carries the finished chip. The node, 3 or 2 nanometre, is a generation label, not a measured length, and each generation needs a costlier fab. India designs a fifth of the world's chips and, until its first commercial fab runs, makes only what the government's old fab at Mohali can; the India Semiconductor Mission pays 40, 35 or 25 per cent of a plant's cost to change that.

Sand to chip: the five links and who holds them

  1. Polysilicon, ingot, wafer

    China dominates polysilicon; Japan and Germany the wafers

  2. Design

    electronic design automation software from three American firms; India's engineers design a fifth of the world's chips

  3. Fabrication

    foundries in Taiwan, South Korea, the United States and China; extreme ultraviolet lithography from ASML alone; India's first commercial fab under construction at Dholera

  4. Assembly, testing, marking and packaging

    Taiwan, China, Malaysia; India's first plants at Sanand, Assam and Jewar

  5. Board and device

    the phone or server, assembled in China, Vietnam and now India

India enters at both ends, design and packaging, because the middle link costs the most and takes the longest.Source: India Semiconductor Mission; standard industry structure
  • The business models: an integrated device manufacturer designs and fabricates (Intel, Samsung); a fabless company designs and outsources (Qualcomm, Nvidia, most Indian design houses); a foundry fabricates for others (TSMC, which makes about nine tenths of the most advanced chips); an outsourced assembly and test firm packages. Design is where India's engineers are; fabrication is where the money and the chokepoints are.
  • The chokepoints a question names: extreme ultraviolet lithography machines from ASML alone; advanced fabrication in Taiwan and South Korea; high bandwidth memory from two Korean firms; advanced packaging, on its own subject; and the export controls the United States has placed since 2022 on advanced chips and tools going to China, which is why chips are now foreign policy. The United States CHIPS Act of 2022 and the mission are the same answer in two countries: pay a fab to come.
  • The India Semiconductor Mission: approved in December 2021 with ₹76,000 crore, it funded fabs, display fabs, compound semiconductor and packaging plants at half their cost, and Semicon 2.0, ₹1,27,500 crore from September 2026, now pays 40, 35 or 25 per cent, with the State adding more, and design firms through the Design Linked Incentive; the projects approved and their dates are on the Semicon India Programme subject, and the Semiconductor Laboratory at Mohali is the government's own old fab. A fab takes four to five years and then a year of learning to make chips that work, which the future of the industry subject explains.
  • Computing that runs on chips: a central processing unit does one thing fast, a graphics processing unit does thousands of things at once, which is why training an artificial intelligence model needs tens of thousands of them; a supercomputer is measured in floating point operations a second, and the National Supercomputing Mission of 2015 builds India's; a data centre is measured in megawatts, and its power and water are on their own subjects.
  • Open architectures: an instruction set is the vocabulary a chip understands; RISC V is a free one, and India's Shakti and Digital India RISC V processors are built on it, so that a design need not license Arm or x86.

Mains: A fab is not a factory but a decade: four years to build, a year to reach yield, and constant reinvestment to stay a generation behind the leaders, so the mission's test is not the first plant but whether a second and third follow without a subsidy each time.

UPSC has asked

  • Mains 2025: the challenges of making semiconductors in India, and the India Semiconductor Mission

See also: Semicon India Programme · The future of India's semiconductor industry · Advanced packaging: the CoWoS chokepoint · High bandwidth memory · India's data centre capacity · Data centres: water, cooling and siting · Mobile Phone Manufacturing Scheme · How a large language model works · Critical minerals: the list, the law and the chain