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Semiconductors, computing hardware and data centres

Semiconductors and computing hardware: India's chip plants and design schemes, the chokepoints in the supply chain, supercomputers and data centres. Prelims has asked where India's semiconductor plants are.

Foundation note: A chip from sand to package: nodes, fabs and the India Semiconductor Mission

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Semicon India Programme

Prelims and Mains

The Semicon India Programme, begun in 2021 under the India Semiconductor Mission, backs the fabrication and the assembly and testing of chips in India.

Design
Engineers design the chip, creating its intellectual property (IP)
Fabrication
Circuits built on silicon wafers in a fab
ATMP/OSAT
Wafers assembled, tested and packaged into finished chips

From The Indian Express, 1 September 2026

How a chip is made

A chip passes through three stages before it is sold: design, where the intellectual property is created; fabrication, where a foundry etches the design onto silicon wafers; and assembly, testing, marking and packaging, which turns wafers into finished chips.
A fabless company designs and sells chips but outsources fabrication.

The programme

It went after the last two stages first, approving 12 projects across six States.
They include Micron's assembly and test plant and a Tata Electronics wafer fab built with Taiwan's Powerchip.
India has many chip design engineers, but most work for multinationals, so the designs and the intellectual property belong elsewhere.
The Semi-Conductor Laboratory at Mohali is India's only working fab, and student designs are sent there for fabrication under the Chips to Startup programme.

Semicon 2.0

The second phase widens capital support beyond wafer fabs to compound semiconductor, photonics, sensor and display fabs, packaging, equipment, materials, research and talent.
It gives design three tracks of its own, to turn Indian designers into Indian owned fabless companies.
Where the first phase bought factories, this one buys the stage before them.

What changed

1 Sep 2026
- The Centre notified Semicon 2.0 with ₹1,27,500 crore under the India Semiconductor Mission.
- Capital support, a uniform 50 per cent before, now varies by kind of unit, and chip design gets up to 75 per cent.
- The near term focus stays on mature nodes of 28 nanometres and above, about 70 per cent of world demand.
The Indian Express, 1 Sep 2026: Semicon 2.0: What is India's Rs 1.27 lakh-crore push for chip design? (opens in a new tab) · The Indian Express, 1 Sep 2026: Domestic chip design to receive big push through Rs 1.27 lakh crore Semicon 2.0 (opens in a new tab) · The Hindu, 31 Aug 2026: Govt notifies ₹1,27,500-crore Semicon 2.0; spells out eligibility norms, sops for chip ecosystem (opens in a new tab) · PIB, 15 Jul 2026: Cabinet approves Semicon 2.0 - Government delivers on its commitment for a long-term policy support to Semiconductors in India (opens in a new tab) · The Indian Express, 15 Jul 2026: Cabinet approves India Semiconductor Mission 2.0 with a six-year outlay of about Rs 1.27 lakh crore (opens in a new tab)

UPSC has asked

Prelims 2026: semiconductor plants in India and their locations

Mobile Phone Manufacturing Scheme

Prelims and Mains

The Mobile Phone Manufacturing Scheme succeeds the production linked incentive for large scale electronics, and pays a share of eligible sales.

It pays extra for components sourced in India and for Indian brands that design their own products.

What changed

15 Jul 2026New
- The Cabinet approved a ₹62,500 crore scheme for 2026 to 27 to 2030 to 31, after the production linked incentive for large scale electronics ended on 31 March 2026.
PIB, 15 Jul 2026: Cabinet approves Mobile Phone Manufacturing Scheme (MPMS) (opens in a new tab)

High bandwidth memory

Mains

High bandwidth memory is memory stacked vertically and connected to the processor through very wide data paths, which is what training large artificial intelligence models depends on, and two South Korean firms make most of it.

The future of India's semiconductor industry

Prelims and Mains

LeadIndia's semiconductor strategy: mature nodes and packagingJune 2026

Why in news

NITI Aayog's Frontier Tech Hub has released a report, Future of India's Semiconductor Industry, reported on 3 June 2026. It advises India to put public money into mature chips and packaging, and not into the most advanced chips.

Background

A semiconductor chip is made in three stages: design, fabrication and packaging and testing.

Fabrication happens in a fab, which etches circuits on silicon wafers. A fab takes four to five years to start production and needs costly imported equipment.
A chip's node, measured in nanometres, describes how small its features are. A smaller node means a more advanced chip.

Mature nodes are older and larger. They run cars, appliances, power equipment and defence systems.
India is strong in design and has no commercial fab yet; the first is expected at Dholera in Gujarat.

What the report says

India's ecosystem cannot yet meet demand, but manufacturing must be pursued for national security.
Do not chase the frontier of 3 to 7 nanometres; build mature and compound semiconductor capacity.

Treat packaging as a core pillar.
Work with partners: the United States, Japan, the European Union and South Korea.
The idea is selective depth: be strong in chosen parts of the chain and not copy all of it.

Why packaging matters now

Packaging places the bare chip in a protective case with connectors.
As shrinking transistors gets harder, performance comes from bundling many chips into one module. This is advanced packaging.

One Taiwanese firm does nearly all of it, and supply is short of demand: a choke point for artificial intelligence chips.
High bandwidth memory, stacked memory used with these chips, is in such demand that ordinary memory prices have more than tripled, raising the cost of phones and computers.

What it means for India

Most of India's approved projects are assembly, testing and packaging units, which matches the report's advice.
Packaging needs less capital than a fab and builds skills that lead upstream.
Dependence on a few suppliers is a risk for every country, as the memory shortage shows.

The way forward

Fund mature node fabs for the chips India uses most.
Build advanced packaging capacity and the skills for it.
Support design firms, where India already has talent, to own their intellectual property.
Secure equipment and materials through partnerships.

Prelims facts

The chip chain: design, fabrication, packaging and testing.
A smaller node means a more advanced chip.
India's first fab is expected at Dholera, Gujarat.
CoWoS, chip on wafer on substrate, is an advanced packaging technology.

Open the lead on its own page

A fabrication plant takes four to five years to reach production, needs over 50 kinds of specialised imported equipment, and then several quarters of yield optimisation. India has no fab yet; the first is expected at Dholera, Gujarat, by 2028, with ten projects in development, and the India Semiconductor Mission's ₹76,000 crore corpus is almost fully earmarked. The chain runs from design to fabrication to packaging and testing.

The chip chain

Design
The chip is designed before any plant makes it
Fabrication
India has no fab; the first is expected at Dholera, Gujarat, by 2028, and the report steers public money to mature and compound nodes rather than frontier 3 to 7 nm nodes
Packaging and testing
Treated by the report as a core pillar of production

The report would put India's public money into fabrication at mature and compound nodes and into packaging, rather than into the frontier nodes.Source: The Hindu, 3 June 2026

What changed

3 Jun 2026LeadIndia's semiconductor strategy: mature nodes and packaging

Advanced packaging: the CoWoS chokepoint

Prelims and Mains

Packaging, also called assembly, wraps bare silicon in protective plastic with connectors that pass signals to other chips on a circuit board. Chips now sit on a substrate of plastic, glass fibre and embedded copper wiring; an interposer, a silicon layer, holds several chips side by side and moves signals between them faster, and for larger AI packages small silicon bridges are embedded in substrates. Packaging was long outsourced to low wage Asian countries; as gains from shrinking transistors diminish, bundling dozens of components into palm sized modules has become the bottleneck for AI chips.

From die to package

Bare die
Bare silicon from the fab, which cannot yet connect to a circuit board
Substrate or interposer
The die sits on a substrate of plastic, glass fibre and copper wiring, or with other chips on a silicon interposer that carries signals between them
CoWoS
TSMC's chip on wafer on substrate puts large AI chips and stacks of high speed memory side by side on an interposer
Finished package
A protected, palm sized module with connectors to the circuit board

As shrinking transistors gives smaller gains, the step that bundles chips together has become the bottleneck for AI hardware.Source: The Indian Express, 28 June 2026

Data centres

India's data centre capacity

Prelims and Mains

A data centre is counted in megawatts of IT load, because uninterrupted power is what it must be given and constant cooling is what that power becomes.

India's capacity has grown more than fourfold since 2020.
Data centres gained infrastructure status through the Finance Ministry's Harmonised List in 2022 to 2023, which opens them to cheaper and longer term lending.

What changed

9 Jul 2026BriefGujarat notified India's first State data centre policy, for 2026 to 29, with support for captive desalination plants. The Hindu, 9 Jul 2026: 'Data centre capacity to jump to 12 GW as AI fuels demand' (opens in a new tab)
11 Jun 2026
- Two Adani data centres for the Google Adani hub in Andhra Pradesh were cleared within nine days as category B projects.
- A category B project needs no public hearing when its built up area is under 1,50,000 sq m, and both sites sit just under it.
- A petition before the National Green Tribunal challenges the clearances.
Mains: The Environment Impact Assessment (EIA) Notification, 2006 predates hyperscale data centres and lets them be appraised as buildings; critics argue for category A where sites lie within 10 km of protected or critically polluted areas.
Frontline, 11 Jun 2026: Is Andhra Pradesh's data centre push a recipe for disaster? (opens in a new tab) · The Hindu, 5 Jun 2026: AI to double data centre power and water consumption by 2030, UN researchers say (opens in a new tab)

Data centres: water, cooling and siting

Prelims and Mains

Data centres are cooled by carrying their heat away with water, which makes cooling the demand that meets a local limit first.

Water and efficiency

A 100 MW data centre uses about 2 million litres of water a day; a conversation of 20 to 50 exchanges with a chatbot uses about half a litre.
The Bureau of Indian Standards measures a data centre by Power Usage Effectiveness: total electricity used divided by the electricity its IT equipment uses.
It also measures Carbon Usage Effectiveness, the Cooling Efficiency Ratio and Water Usage Effectiveness.
The building must meet the Energy Conservation Building Code 2017 and the Energy Conservation and Sustainable Building Code 2024.
Direct to chip liquid cooling, adiabatic cooling and immersion cooling bring the ratios down.

Clearance and siting

Environmental clearance is needed only where a data centre forms part of a building project over 20,000 sq m or a township, and it is granted by the State Environment Impact Assessment Authority.
State incentive packages ask for neither a water disclosure nor a grid impact assessment, so the clustering has been towards States already short of water.

What changed

26 Jul 2026
- Residents of Thane protested against a hyperscale data centre needing about 422 MW of continuous power, in a city already short of water by 40 million litres a day.
- In Visakhapatnam and Anakapalli, land allotted for a 1 GW hub drew objections over water, power and nearby forest.
- Maharashtra cut the green energy requirement for such projects from 100 to 51 per cent in June 2026.
The Hindu, 26 Jul 2026: Why are mega data centre projects facing stiff resistance? (opens in a new tab) · Frontline, 7 Aug 2026: A residents' campaign against a hyperscale data centre inside Thane city has turned data centre siting into a mainstream environmental dispute in Maharashtra, with water, power and heat as the contested grounds. (opens in a new tab) · The Indian Express, 23 Jul 2026: Data centre construction is being halted abroad over power, water and local costs, as India expands its own (opens in a new tab)

Background reading: PIB, 14 Sep 2026: Data Centres in India: Infrastructure for the Digital Age (opens in a new tab)

Also filed elsewhere

Photonics · on Satellite and emerging communications
Photonics is the technology of the parts that carry a signal as light rather than as current, where India's chip policy meets its network hardware.